In the recent development, a recessed channel has been provided with the intention of alleviating short channel effects in Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). FIG. 1 illustrates the formation of the recessed channel in the MOSFET, in which a patterned mask 110 is lithographically formed on a Si substrate 100, and then an etching step is performed to create the recessed structure on the substrate 100. However, as the device dimension continuously shrinks, the process window becomes more and more narrow or critical, which poses more difficulties while forming the patterned mask by lithography process. Therefore, it would be desirable to provide an improved method to resolve the above-described problem.